This course describes the FPGA design best practices and skills to be successful using the Vivado™ Design Suite. This includes the necessary skills to improve design speed and reliability, including: system reset design, synchronization circuits, optimum HDL coding techniques, and timing closure techniques using the Vivado software. This course encapsulates this information with an FPGA design methodology case study. The full FPGA Design Methodology Checklist is also introduced.
FPGA Design Methodology 228.57 KB